? semiconductor components industries, llc, 2010 june, 2010 ? rev. 1 1 publication order number: p3i2005a/d p3i2005a general purpose peak emi reduction ic product description p3i2005a is a versatile, 3.3 v / 5 v, 1x spread spectrum frequency modulator designed to reduce electromagnetic interference (emi) at the clock source, allowing system wide reduction of emi of down stream clock and data dependent signals. the device allows significant system cost savings by reducing the number of circuit board layers ferrite beads, shielding and other passive components that are traditionally required to pass emi regulations. p3i2005a modulates the output of a pll in order to ?spread? the bandwidth of a synthesized clock, and more importantly, decreases the peak amplitudes of its harmonics. this results in significantly lower system emi compared to the typical narrow band signal produced by oscillators and most frequenc y generators. lowering emi by increasing a signal?s bandwidth is called ?spread spectrum clock generation?. p3i2005a accepts an input from an external reference clock and locks to a 1x modulated clock output. two logic pins s0 and d_c enable selecting one of the 4 different frequency deviations. refer deviation selection table. frequency range selection pin enables operation in one of the two frequency ranges. p3i2005a operates over a supply voltage range of 5 v / 3.3 v. p3i2005a is available in 8 pin soic package. features ? 1x, lvcmos peak emi reduction ? input clock frequency : 10 mhz ? 100 mhz ? output clock frequency : 10 mhz ? 100 mhz ? four different frequency deviation selection ? frequency range selection ? supply voltage: 5 v 0.5 v 3.3 v 0.3 v ? 8 pin soic package ? these devices are pb ? free, halogen free/bfr free and are rohs compliant application ? p3i2005a is targeted for use in a broad range of notebook and desktop pcs and consumer electronic applications. soic ? 8 case 751 marking diagram http://onsemi.com pin configuration see detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. ordering information vdd d_c clkin/xin 1 2 3 4 5 6 7 8 s0 modout gnd frs p3i2 0 05a xout 1 8 afg = specific device code a = assembly location l = wafer lot y = year w = work week = pb ? free package afg alywx 1 8
p3i2005a http://onsemi.com 2 gnd clkin/xin modout pll frs xout d_c s0 vdd crystal oscillator figure 1. block diagram pin description pin# pin name type description 1 clkin / xin i external reference clock input or crystal connection. 2 xout o crystal connection. if using an external reference, this pin must be left unconnected. 3 d_c i deviation selection. has an internal pull ? up resistor. refer to deviation selection table 4 gnd p ground connection. 5 s0 i deviation selection. has an internal pull ? up resistor. refer to deviation selection table 6 frs i frequency range selection. has an internal pull ? up resistor 7 modout o buffered modulated clock output. 8 vdd p power supply for the entire chip(3.3 v/5 v) frequency range selection table frs frequency(mhz) 0 10 ? 30 1 30 ? 100 deviation selection table deviation (%) d_c s0 fs = 0 fs = 1 10 mhz 20 mhz 30 mhz 30 mhz 80 mhz 100 mhz 0 0 ? 4.5 ? 3.6 ? 1.7 ? 4.8 ? 3.6 ? 2.6 0 1 ? 2.6 ? 2 ? 1 ? 2.7 ? 2 ? 1.5 1 0 2.6 2 1 2.75 2 1.5 1 1 1.7 1.25 0.7 1.8 1.25 1
p3i2005a http://onsemi.com 3 operating conditions symbol parameter min max unit vdd (5v) supply voltage 4.5 5.5 v vdd (3.3v) supply voltage 3 3.6 v t a operating temperature ? 40 +85 c c l load capacitance 15 pf c in input capacitance 7 pf absolute maximum ratings symbol parameter rating unit vdd, v in voltage on any input pin with respect to ground ? 0.5 to +7.0 v t stg storage temperature ? 65 to +125 c t s max. soldering temperature (10 sec) 260 c t j junction temperature 150 c t dv static discharge voltage (as per jedec std22 ? a114 ? b) 2 kv stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliability. dc electrical characteristics for v dd = 5 v 0.5 v symbol parameter min typ max unit vdd operating voltage 4.5 5.0 5.5 v v il input low voltage gnd ? 0.3 0.8 v v ih input high voltage 2.0 v dd + 0.3 v i il input low current 100 a i ih input high current 100 a v ol output low voltage (i ol = 12 ma) 0.4 v v oh output high voltage (i oh = ? 12 ma) 2.5 v i cc static supply current (clkin/xin pulled to gnd) 12 ma i dd dynamic supply current (unloaded output) fs = 0 (@ 30 mhz) 34 ma fs = 1 (@ 100 mhz) 40 z out output impedance 30
p3i2005a http://onsemi.com 4 ac electrical characteristics for v dd = 5 v 0.5 v symbol parameter min typ max unit clkin/xin input clock frequency frs = 0 10 30 mhz frs = 1 30 100 modout output clock frequency frs = 0 10 30 mhz frs = 1 30 100 t lh (notes 1 & 2) output rise time (measured between 20% to 80%) 1.6 2 ns t hl (notes 1 & 2) output fall time (measured between 80% to 20%) 1.2 1.6 ns t d (notes 1 & 2) output duty cycle 45 50 55 % t jc (note 2) jitter (cycle to cycle) @ fs = 0, 24 mhz and fs = 1, 80 mhz 250 350 ps t on (notes 1 & 2) pll lock time (stable vdd, valid clock presented on clkin/xin) 3 ms 1. all parameters are specified with 15 pf loaded output. 2. parameter is guaranteed by design and characterization. not 100% tested in production dc electrical characteristics for v dd = 3.3 v 0.3 v symbol parameter min typ max unit vdd operating voltage 3 3.3 3.6 v v il input low voltage gnd ? 0.3 0.8 v v ih input high voltage 2.0 vdd + 0.3 v i il input low current 100 a i ih input high current 100 a v ol output low voltage (i ol = 12 ma) 0.4 v v oh output high voltage (i oh = ? 12 ma) 2.5 v i cc static supply current (clkin/xin pulled to gnd) 11 ma i dd dynamic supply current (unloaded output) fs = 0 (@ 30 mhz) 26 ma fs = 1 (@ 100 mhz) 32 z out output impedance 40
p3i2005a http://onsemi.com 5 ac electrical characteristics for v dd = 3.3 v 0.3 v symbol parameter min typ max unit clkin/xin input clock frequency frs = 0 10 30 mhz frs = 1 30 100 modout output clock frequency frs = 0 10 30 mhz frs = 1 30 100 t lh (notes 3 & 4) output rise time (measured between 20% to 80%) 1.9 2.5 ns t hl (notes 3 & 4) output fall time (measured between 80% to 20%) 1.5 2 ns t d (notes 3 & 4) output duty cycle 45 50 55 % t jc (note 4) jitter (cycle to cycle) @ fs=0, 24mhz & fs=1, 80 mhz 250 350 ps t on (notes 3 & 4) pll lock time (stable vdd, valid clock presented on clkin/xin) 3 ms 3. all parameters are specified with 15 pf loaded output. 4. parameter is guaranteed by design and characterization. not 100% tested in production ordering information part number marking package temperature shipping ? p3i2005ag ? 08sr afg 8 ? pin soic (pb ? free) ? 40 c to +85 c tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. *a ?microdot? placed at the end of last row of marking or just below the last row toward the center of package indicates pb ? free.
p3i2005a http://onsemi.com 6 package dimensions soic ? 8 nb case 751 ? 07 issue aj seating plane 1 4 5 8 n j x 45 k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 6. 751 ? 01 thru 751 ? 06 are obsolete. new standard is 751 ? 07. a b s d h c 0.10 (0.004) dim a min max min max inches 4.80 5.00 0.189 0.197 millimeters b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.053 0.069 d 0.33 0.51 0.013 0.020 g 1.27 bsc 0.050 bsc h 0.10 0.25 0.004 0.010 j 0.19 0.25 0.007 0.010 k 0.40 1.27 0.016 0.050 m 0 8 0 8 n 0.25 0.50 0.010 0.020 s 5.80 6.20 0.228 0.244 ? x ? ? y ? g m y m 0.25 (0.010) ? z ? y m 0.25 (0.010) z s x s m 1.52 0.060 7.0 0.275 0.6 0.024 1.270 0.050 4.0 0.155 mm inches scale 6:1 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 p3i2005a/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
|
